In this tutorial we are going to learn how to communicate with PC using UART protocol. Atmega128 has two USART, USART0 and USART1. For more information about basics of UART refer AVR tutorial. We will discuss in this tutorial about USART0 thoroughly.

UART Module

Atmega128 has two UART are named USART0 and USART1. Each UART has Receiver and Transmitter pins which are name as RXD0 and TXD0 for USART0 and similarly RXD1 and TXD1 for USART1. Atmega128 has multiplexed pins so we configure these if we want to use UART's. Below table shows the multiplexed pins related to UART.

Port Pin Pin no. Port Function Port Function
PE0 2 PDI RXD0
PE1 3 PDO TXD0
PD2 27 INT2 RXD1
PD3 28 INT3 TXD1

UART Register

The below table shown registers are associated with Atmega128 UART.

Register Description
UDR USART Data Register
UCSR0A USART0 Control and Status Register A
UCSR0B USART0 Control and Status Register B
UCSR0C USART0 Control and Status Register C
UBRR0L USART0 Baud Rate Register L
UBRR0H USART0 Baud Rate Register H

UART Register Configuration

We will see now how to configure the UART registers.

UCSR0A
USART0 Control and Status Register A
D7 D6 D5 D4 D3 D2 D1 D0
RXC0 TXC0 UDRE0 FE0 DOR0 UPE0 U2X0 MPCM0

This bit is used to show the status of the received buffer.

  • Bit 7 - RXC0 : USART Receive complete

1 : Unread data in the Receiver buffer
0 : Receive buffer is empty.

This bit us used to show the status of the transmitted buffer.

  • Bit 6 - TXC0 : USART transmit complete

1 : No data present in the buffer register to transmit
0 : Transmit complete interrupt is executed. This bit indicates whether Transmit data buffer ready to receive new data.

  • Bit 5 - UDRE0 : USART Data Register empty

1 : Transmitter buffer is empty
0 : Transmitter is ready.

This bit us used to show the Frame error.

  • Bit 4 - FE0 : Frame error

1 : Next character in the receiver buffer had error
0 : Writing to UCSR0A.

This bit us used to show the Receiver data over run occure.

  • Bit 3 - DOR0 : Data over run

1 : Receiver buffer is full (Receiver data over run occure)
0 : Writing to UCSR0A.

This bit us used to show the parity error.

  • Bit 2 - UPE0 : Parity Error

1 : Next character in the receiver buffer had a parity error
0 : Writing to UCSR0A.

This bit has effect for the Asynchronous operation. For Synchronous operation write this bit to 0.

  • Bit 1 - U2X0: Double the USART transmission speed

1 :Reduces the divisor of the baud rate divider from 16 to 8 effectively doubling the transfer rate of Asynchronous communication
0 : Synchronous operation.

This bit enables the multiprocessor communication.

  • Bit 1 - MPCM0: Multiprocessor communication mode

1 :All the incoming frames received by the USART Receiver that do not contain address information will be ignored.
0 : Writing to UCSR0A.





UCSRB
USART Control and Status Register B
D7 D6 D5 D4 D3 D2 D1 D0
RXCIE TXCIE UDREIE RXEN TXEN UCSZ2 RXB8 TXB8

Bit 4 - RXEN: Receiver Enable

Writing this bit to one enables the USART Receiver.

Bit 3 - TXEN: Transmitter Enable

Writing this bit to one enables the USART Transmitter.

UCSRC
USART Control and Status Register C
D7 D6 D5 D4 D3 D2 D1 D0
URSEL UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL


Video Tutorial

For those of you, who would like to watch instead of read we have made a video with all the gyan.


Downloads

Download the complete project folder from the below link: https://github.com/ExploreEmbedded/ATmega32_ExploreUltraAvrDevKit/archive/master.zip


Have a opinion, suggestion , question or feedback about the article let it out here!


Video Tutorial

For those of you, who would like to watch instead of read we have made a video with all the gyan.



Downloads

Download the complete project folder from the below link: https://github.com/ExploreEmbedded/ATMega-128-Break-Out-BoardDVB-12007/archive/master.zip


Have a opinion, suggestion , question or feedback about the article let it out here!