Difference between revisions of "PIC16F877A PWM"
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| − | | | + | |7 || 6 || 5 || 4 || 3 || 2 || 1 || 0 |
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| − | | | + | |— || — || CCPxX || CCPxY || CCPxM3 || CCPxM2 || CCPxM1 || CCPxM0 |
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| − | + | <b>CCPxX:CCPxY:</b> PWM Least Significant bits<br> | |
| − | + | These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL. | |
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| − | + | <b>CCPxM3:CCPxM0:</b> CCPx Mode Select bits<br> | |
| − | + | 0000 - Capture/Compare/PWM disabled (resets CCPx module)<br> | |
| − | + | 0100 - Capture mode, every falling edge<br> | |
| − | + | 0101 - Capture mode, every rising edge<br> | |
| − | + | 0110 - Capture mode, every 4th rising edge<br> | |
| − | + | 0111 - Capture mode, every 16th rising edge<br> | |
| − | + | 1000 - Compare mode, set output on match (CCPxIF bit is set)<br> | |
| − | + | 1001 - Compare mode, clear output on match (CCPxIF bit is set)<br> | |
| − | + | 1010 - Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin is unaffected)<br> | |
| − | <br> | + | 1011 - Compare mode, trigger special event (CCPxIF bit is set, CCPx pin is unaffected); CCP1 resets TMR1; CCP2 resets TMR1 and starts an A/D conversion (if A/D module is enabled)<br> |
| − | + | <b>11xx - PWM mode</b> | |
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=PWM Working= | =PWM Working= | ||
Revision as of 09:28, 9 May 2016
In this tutorial we are going to discuss the PWM module of PIC16F877A.
First we will see how to configure the PWM registers to generate signals of required PWM, At the end we will see how to use the ExploreEmdedded PWM library.
Contents
PIC16F877A PWM Module
PIC16F877A microcontroller has two independent CCP(Capture/Compare/PWM) modules, named as CCP1 and CCP2. Each CCP module has two 8-bit resistors(CCPxH,CCPxL) that can be use as:
- 16 bit Capture Register
- 16 bit Compare Register
- 10-bit PWM Regsietrs .
In this tutorial we will be discussing only the PWM part of CCP. PIC has 2PWM module with a resolution of 10-bits. The 8-Msb bits are stored in CCPRxL and remeining 2-bits in CCPxCON register. Below tables shows the PWM module of PIC.
| PWM Channel | Port Pin | Control Register | Duty Cycle Register |
|---|---|---|---|
| PWM1 | PC.2 | CCP1CON | CCPR1L |
| PWM2 | PC.1 | CCP2CON | CCPR2L |
PIC16F877A PWM Registers
The below table shows the registers associated with PIC16F877A PWM.
| Register | Description |
|---|---|
| CCPxCON | This register is used to Configure the CCP module for Capture/Compare/PWM opertaion. |
| CCPRxL | This register holds the 8-Msb bits of PWM, lower 2-bits will be part of CCPxCON register. |
| TMR2 | Free running counter which will be compared with CCPR1L and PR2 for generating the PWM output. |
Register Configuration
The below table shows the registers associated with LPC1768 PWM.
| CCPxCON | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| — | — | CCPxX | CCPxY | CCPxM3 | CCPxM2 | CCPxM1 | CCPxM0 |
CCPxX:CCPxY: PWM Least Significant bits
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM3:CCPxM0: CCPx Mode Select bits
0000 - Capture/Compare/PWM disabled (resets CCPx module)
0100 - Capture mode, every falling edge
0101 - Capture mode, every rising edge
0110 - Capture mode, every 4th rising edge
0111 - Capture mode, every 16th rising edge
1000 - Compare mode, set output on match (CCPxIF bit is set)
1001 - Compare mode, clear output on match (CCPxIF bit is set)
1010 - Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin is unaffected)
1011 - Compare mode, trigger special event (CCPxIF bit is set, CCPx pin is unaffected); CCP1 resets TMR1; CCP2 resets TMR1 and starts an A/D conversion (if A/D module is enabled)
11xx - PWM mode
PWM Working
After looking into the PWM registers, its time to see how the LPC1768 PWM module works.
The TC is continuously incremented and once it matches the MR1(Duty Cycle) the PWM pin is pulled Low. TC still continues to increment and once it reaches the Cycle time(Ton+Toff) the PWM module does the following things:
- Reset the TC value.
- Pull the PWM pin High.
- Loads the new Match register values.
Summary of PWM operations for the above image:
- Slide1: The TC is being incremented as per the Pre-scalar configuration. The PWM output is high as the TC is still less that duty cycle.
- Slide2: TC is incremented to 40 and still the PWM pin as HIGH.
- Slide3: TC is incremented to 60 and it matches the Duty Cycle(MR1=60).
- Slide4: Now the Comparator1(Green) will trigger the R of SR latch and Pulls the PWM output to Zero(Q=0). TC still continues to increment.
- Slide5: TC is incremented to 80 and PWM pin is low as TC>Duty Cycle.
- Slide6: Now TC is 100 and it matches the Cycle time(MR0==100).
- Slide7: Now the Comparator2(Red) will trigger the S of SR latch and pulls the PWM output to ONE(Q==1). It also resets the TC to zero. It updates Shadow buffers with new Match values from MRO,MR1.
Steps to Configure PWM
- Configure the GPIO pins for PWM operation in respective PINSEL register.
- Configure TCR to enable the Counter for incrementing the TC, and Enable the PWM block.
- Set the required pre-scalar value in PR. In our case it will be zero.
- Configure MCR to reset the TC whenever it matches MR0.
- Update the Cycle time in MR0. In our case it will be 100.
- Load the Duty cycles for required PWMx channels in respective match registers MRx(x: 1-6).
- Enable the bits in LER register to load and latch the new match values.
- Enable the required pwm channels in PCR register.
Example
Program to demonstrates the variable PWM signal generation on PWM_1-PWM_4(P2_0 - P2_3).
Connect the Leds to the pins P2_0 to P2_3 and observe the led brigthness change depending on the dutycycle.