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| − | [[category: ARM Tutorials]]
| + | #Redirect LPC1768: ADC Programming |
| − | [[User:Amruta|Amruta]] ([[User talk:Amruta|talk]]) 13:28, 17 March 2015 (IST)
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| − | ----
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| − | =Basics=
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| − | LPC1768 has 12 bit ADC which is multiplexed among 8 input pins. It's measurement range is typically 3V which means that ADC resolution is approximately 0.7 mV.
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| − | ===Registers===
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| − | Here we will discuss commonly used ADC registers.
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| − | =====ADCR ( ADC Control Register )=====
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| − | {| class="wikitable" style="text-align:center; background-color:#ABCDEF;margin: 1em auto 1em auto"
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| − | !colspan = '9'|ADCR
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| − | |-
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| − | |31:28|| 27 || 26:24|| 23:22 || 21 || 20:17 || 16|| 15:8 || 7:0
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| − | |-
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| − | |Reserved||EDGE||START||Reserved|| PDN || Reserved || BURST || CLCKDIV || SEL
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| − | |}
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| − | '''Bit 7:0 – SEL : Channel Select'''
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| − | These bits select which of the AD0.7:0 pins is (are) to be sampled and converted. There is one bit per channel e. g. bit o for AD0, bit 7 AD7.
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| − | Write one to enable respective channel. All zeroes is equivalent to 0x01.
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| − | '''Bit 15:8 – CLCKDIV : Clock Divisor'''
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| − | The APB clock (PCLK_ADC0) is divided by (this value plus one) to produce the clock for the A/D converter, which should be less than or equal to 13 MHz.
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| − | '''Bit 16 – BURST'''
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| − | Repeated conversions can be terminated by clearing this bit.
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| − | '''Bit 21 – PDN : Power Down Mode'''
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| − | Setting this bit brings ADC out of power down mode and makes it operational.
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| − | '''Bit 24:26 – START'''
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| − | When the BURST bit is 0, these bits control whether and when an A/D conversion is started:
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| − | {| class="wikitable" style="text-align:center; background-color:#C0C0C0;"
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| − | !Bit Value || FIFO Status
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| − | |-
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| − | |000|| No Start
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| − | |-
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| − | |001|| Start Conversion Now
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| − | |}
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| − | The remaining cases (010 to 111) are about starting conversion on occurrence of edge on a particular CAP or MAT pin.
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| − | '''Bit 27 - EDGE'''
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| − | This bit is significant only when the START field contains 010-111.
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| − | It starts conversion on selected CAP or MAT input.
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| − | {| class="wikitable" style="text-align:center; background-color:#C0C0C0;"
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| − | !Bit Value || Start Conversion
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| − | |-
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| − | |0|| On Falling Edge
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| − | |-
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| − | |1||On Rising Edge
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| − | |-
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| − | |}
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| − | =====ADGDR ( ADC Global Data Register )=====
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| − | {| class="wikitable" style="text-align:center; background-color:#ABCDEF;margin: 1em auto 1em auto"
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| − | !colspan = '9'|ADCR
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| − | |-
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| − | |31|| 27 || 26:24|| 23:16|| 15:4 || 3:0
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| − | |-
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| − | |DONE||OVERRUN||CHN || Reserved || RESULT|| Reserved
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| − | |}
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| − | '''Bit 15:4 - RESULT'''
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| − | When DONE is 1, this field contains a digital value equivalent to the voltage on the AD0[n] pin selected by the SEL field in ADCR register.
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| − | '''Bit 23:16 - CHN : Channel'''
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| − | These bits contain the channel from which the RESULT bits were converted (e.g.
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| − | 000 identifies channel 0, 011 channel 3...).
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| − | '''Bit 27 - OVERRUN'''
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| − | This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the RESULT bits.
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| − | '''Bit 31 - DONE'''
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| − | This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read and when the ADCR is written. If the ADCR is written while a conversion is still in progress, this bit is set and a new conversion is started.
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| − | ====Some other registers====
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| − | Though there are some more registers, we are restricting ourselves to use these registers only as this will be more convenient.
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| − | Apart from ADC Global Data register there are more 8 ADC Data registers (one Data register per ADC channel). DONE and OVERRUN bits for each channel can be monitored separately from the bits present in ADC Status register.
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| − | One can use the A/D Global Data Register to read all data from the ADC else use the A/D Channel Data
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| − | Registers. It is important to use one method consistently because the DONE and OVERRUN flags can otherwise get out of synch between the AD0GDR and the A/D Channel Data Registers, potentially causing erroneous interrupts or DMA activity.
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| − | =Schematic=
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| − | [[File:Schematic LPC1768 ADC.svg|x500px|center|Schematic]]
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| − | =Code=
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| − | <syntaxhighlight>
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| − | /*-----------------------------------------------------------------------------
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| − | note : Refer adc.h to enable ADC channels.
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| − | ------------------------------------------------------------------------------*/
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| − | #include "lpc17xx.h" //device specific heaader file
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| − | #include "uart.h" //Explore Embedded UART library which conatins the lcd routines
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| − | #include "adc.h" //Explore Embedded ADC library which conatins the adc routines
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| − | /* start the main program */
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| − | int main()
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| − | {
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| − | uint16_t adc_result;
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| − | /* Setup and initialize the microcontroller system */
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| − | SystemInit();
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| − | /* Initialize the UART before displaying any thing on the lcd */
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| − | UART_Init(UART0,9600);
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| − | /* Initialize the adc before starting the conversion */
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| − | ADC_Init();
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| − | /* Display "ADC Channel zero" on first line*/
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| − | UART_Printf("ADC Channel five");
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| − | /* Display the adc channel zero value continously */
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| − | while(1)
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| − | {
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| − | /*Get the adc value of channel five */
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| − | adc_result= ADC_GetAdcValue(5);
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| − |
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| − | /*Display the adc value on UART*/
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| − | UART_Printf("\n %u",adc_result);
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| − | }
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| − | }
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| − | </syntaxhighlight>
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| − | {{DISQUS}}
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