UART Serial communication using 8051

We have covered the basics of timers in the previous tutorial, with that we can see how can a microcontroller communicate with a computer serially.

There are two ways to connect a microcontroller to a computer.

  • Using RS232 protocol to the legacy serial port.
  • Using a USB to serial convertor.

From microcontroller programming point of view, there is fundamentally no difference.


8051 UART Registers

The important registers for serial communication are:

  • SBUFF, it is a serial buffer for data. It holds 8 bit data that needs to be transmitted or the data that is received. Since the serial port of 8051 is full duplex, the microcontroller internally manages to transmit and receive data into the buffer register simultaneously.
  • SCON; Serial Control register SCON is also an 8 bit register used for configuring different modes for serial communication as described below.

SBUFF: Serial buffer register

SBUFF
D7 D6 D5 D4 D3 D2 D1 D0

SCON: Serial Control Register

SCON
D7 D6 D5 D4 D3 D2 D1 D0
SM0 SM1 SM2 REN TB8 RB8 TI RI


  • SM0 - Serial port mode bit 0 is used for serial port mode selection.
  • SM1 - Serial port mode bit 1.
SM0 SM1 Operation Description Baud Rate Source
0 0 Mode 0 8bit ShiftReg 1/12 the quartz frequency
0 1 Mode 1 8 bit UART Determined by the timer 1
1 0 Mode 2 9 bit UART 1/32 the quartz frequency
1 1 Mode 0 9 bit UART Determined by the timer 1


  • SM2 - Serial port mode 2 bit, also known as multiprocessor communication enable bit. When set, it enables multiprocessor communication in mode 2 and 3, and eventually mode 1. It should be cleared in mode 0.
  • REN - Reception Enable bit enables serial reception when set. When cleared, serial reception is disabled.
  • TB8 - Transmitter bit 8. Since all registers are 8-bit wide, this bit solves the problem of transmitting the 9th bit in modes 2 and 3. It is set to transmit a logic 1 in the 9th bit.
  • RB8 - Receiver bit 8 or the 9th bit received in modes 2 and 3. Cleared by hardware if 9th bit received is a logic 0. Set by hardware if 9th bit received is a logic 1.
  • TI - Transmit Interrupt flag is automatically set at the moment the last bit of one byte is sent. It's a signal to the processor that the line is available for a new byte transmite. It must be cleared from within the software.
  • RI - Receive Interrupt flag is automatically set upon one byte receive. It signals that byte is received and should be read quickly prior to being replaced by a new data. This bit is also cleared from within the software.