Line 37: Line 37:
 
|}
 
|}
  
'''Bit 15:4 - RESULT'''<br>
+
'''Bit 0 - ENABLE '''<br>
This field contains the 12bit A/D conversion value for the selected channel in <b>ADCR.SEL</b><br>
+
This bit is used to enable/disable the systick counter.<br>
The vale for this register should be read oncve the conversion is completed ie DONE bit is set.
+
0-Disable the systick timer.
 +
1-Enables the systick timer.
  
  
'''Bit 26:24 - CHN : Channel'''<br>
+
'''Bit 1 - TICKINT'''<br>
These bits contain the channel number for which the A/D conversion is done and the converted value is available in RESULT bits(e.g. 000 identifies channel 0, 011 channel 3...).
+
This bit is used to enable/disable the systick timer interrupt. When enabled the SysTick_Handler ISR will be called.<br>
 +
0-Disable the systick timer Interrupt.
 +
1-Enables the systick timer Interrupt.
  
  
'''Bit 27 - OVERRUN'''<br>
+
'''Bit 2 - CLKSOURCE'''<br>
This bit is set during the BURST mode where the previous conversion data is overwritten by the new A/D conversion value.
+
This bit is used to enable/disable the systick timer interrupt. When enabled the SysTick_Handler ISR will be called.<br>
 +
0-Disable the systick timer Interrupt.
 +
1-Enables the systick timer Interrupt.
  
  

Revision as of 14:39, 15 April 2016

Objective

In this tutorial we will discuss how to configure lpc1768 systick timer for 1ms tick.
At the end of the tutorial we will see how to use the ExploreEmbedded sysTick libraries.



Systick Module

The System Tick Timer is an integral part of the Cortex-M3. The System Tick Timer is intended to generate a fixed 10 millisecond(user configurable) interrupt for use by an operating system or other system management software.

The System Tick Timer is a 24-bit timer that counts down to zero and generates an interrupt. The intent is to provide a fixed time interval between interrupts.

In order to generate recurring interrupts at a specific interval, the STRELOAD register must be initialized with the correct value for the desired interval.



Registers

Register Address Description
STCTRL 0xE000 E010 System Timer Control and status register
STRELOAD 0xE000 E014 System Timer Reload value register
STCURR 0xE000 E018 System Timer Current value register
STCALIB 0xE000 E01C System Timer Calibration value register





STCTRL
31-17 16 15-3 2 1 0
RESERVED COUNTFLAG RESERVED CLKSOURCE TICKINT ENABLE

Bit 0 - ENABLE
This bit is used to enable/disable the systick counter.
0-Disable the systick timer. 1-Enables the systick timer.


Bit 1 - TICKINT
This bit is used to enable/disable the systick timer interrupt. When enabled the SysTick_Handler ISR will be called.
0-Disable the systick timer Interrupt. 1-Enables the systick timer Interrupt.


Bit 2 - CLKSOURCE
This bit is used to enable/disable the systick timer interrupt. When enabled the SysTick_Handler ISR will be called.
0-Disable the systick timer Interrupt. 1-Enables the systick timer Interrupt.


Bit 31 - DONE
This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read and when the ADCR is written. If the ADCR is written while a conversion is still in progress, this bit is set and a new conversion is started.

Code

Using ExploreEmbedded Libraries

00 Lpc1768 Timer.jpg