Difference between revisions of "Serial Communication with PIC16F877A"
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| − | <b>Bit7- SPEN:</b> Serial Port Enable bit | + | <b>Bit7- SPEN:</b> Serial Port Enable bit<br> |
| − | 1 = Serial port enabled (configures RC7/RX/DT and RC6/TX/CK pins as serial port pins) | + | 1 = Serial port enabled (configures RC7/RX/DT and RC6/TX/CK pins as serial port pins)<br> |
0 = Serial port disabled | 0 = Serial port disabled | ||
| − | <b>Bit6 RX9:</b> 9-bit Receive Enable bit | + | <b>Bit6 RX9:</b> 9-bit Receive Enable bit<br> |
| − | 1 = Selects 9-bit reception | + | 1 = Selects 9-bit reception<br> |
0 = Selects 8-bit reception | 0 = Selects 8-bit reception | ||
| − | <b>Bit5- SREN:</b> Single Receive Enable bit | + | <b>Bit5- SREN:</b> Single Receive Enable bit<br> |
Asynchronous mode:Don’t care. | Asynchronous mode:Don’t care. | ||
| − | <b>Bit4- CREN:</b> Continuous Receive Enable bit | + | <b>Bit4- CREN:</b> Continuous Receive Enable bit<br> |
| − | Asynchronous mode: | + | Asynchronous mode:<br> |
| − | 1 = Enables continuous receive | + | 1 = Enables continuous receive<br> |
0 = Disables continuous receive | 0 = Disables continuous receive | ||
| − | <b>Bit3- ADDEN:</b> Address Detect Enable bit | + | <b>Bit3- ADDEN:</b> Address Detect Enable bit<br> |
| − | Asynchronous mode 9-bit (RX9 = 1): | + | Asynchronous mode 9-bit (RX9 = 1):<br> |
| − | 1 = Enables address detection, enables interrupt and load of the receive buffer when RSR | + | 1 = Enables address detection, enables interrupt and load of the receive buffer when RSR is set<br> |
| − | is set | + | |
0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit | 0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit | ||
| − | <b>Bit2- FERR:</b> Framing Error bit | + | <b>Bit2- FERR:</b> Framing Error bit<br> |
| − | 1 = Framing error (can be updated by reading RCREG register and receive next valid byte) | + | 1 = Framing error (can be updated by reading RCREG register and receive next valid byte)<br> |
0 = No framing error | 0 = No framing error | ||
| − | <b>Bit1- OERR:</b> Overrun Error bit | + | <b>Bit1- OERR:</b> Overrun Error bit<br> |
| − | 1 = Overrun error (can be cleared by clearing bit CREN) | + | 1 = Overrun error (can be cleared by clearing bit CREN)<br> |
0 = No overrun error | 0 = No overrun error | ||
<b>Bit0- RX9D:</b> 9th bit of Received Data (can be parity bit but must be calculated by user firmware) | <b>Bit0- RX9D:</b> 9th bit of Received Data (can be parity bit but must be calculated by user firmware) | ||
Revision as of 10:42, 5 May 2016
In this tutorial we are going to discuss the serial/UART communication using PIC16F877A.
PIC16F877A comes with inbuilt USART which can be used for Synchronous/Asynchronous communication. We will be discussing only the UART. After understating the basics of PIC16F877A UART module, We will see how to use the ExploreEmbedded libraries to communicate with any of the UART devices.
UART Registers
The below table shows the registers associated with PIC16F877A UART.
| Register | Description |
|---|---|
| TXSTA | Transmit Status And Control Register |
| RCSTA | Receive Status And Control Register |
| SPBRG | USART Baud Rate Generator |
UART Register Configuration
Now lets see how to configure the individual registers for UART communication.
| TXSTA | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CSRC | TX9 | TXEN | SYNC | - | BRGH | TRMT | TX9D |
| RCSTA | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SPEN | RX9 | SREN | CREN | ADDEN | FERR | OERR | RX9D |
Bit7- SPEN: Serial Port Enable bit
1 = Serial port enabled (configures RC7/RX/DT and RC6/TX/CK pins as serial port pins)
0 = Serial port disabled
Bit6 RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
Bit5- SREN: Single Receive Enable bit
Asynchronous mode:Don’t care.
Bit4- CREN: Continuous Receive Enable bit
Asynchronous mode:
1 = Enables continuous receive
0 = Disables continuous receive
Bit3- ADDEN: Address Detect Enable bit
Asynchronous mode 9-bit (RX9 = 1):
1 = Enables address detection, enables interrupt and load of the receive buffer when RSR is set
0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit
Bit2- FERR: Framing Error bit
1 = Framing error (can be updated by reading RCREG register and receive next valid byte)
0 = No framing error
Bit1- OERR: Overrun Error bit
1 = Overrun error (can be cleared by clearing bit CREN)
0 = No overrun error
Bit0- RX9D: 9th bit of Received Data (can be parity bit but must be calculated by user firmware)