Difference between revisions of "LPC1768: External Interrupts"
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| − | <b>EINTx:</b> Bits will be set | + | <b>EINTx:</b> Bits will be set whenever the interrupt is detected on the particular interrupt pin.<br> |
| − | Writing one to specific bit will clear the interrupt. | + | If the interrupts are enabled then the control goes to ISR.<br> |
| − | <br><br><br><br><br> | + | Writing one to specific bit will clear the corresponding interrupt. |
| + | <br><br> | ||
| + | |||
| + | |||
| + | {| class="table table-striped table-hover table-condensed table-bordered" | ||
| + | |-class="info" | ||
| + | |EXTMODE | ||
| + | |- | ||
| + | |31:4 || 3 || 2 || 1 || 0 | ||
| + | |- | ||
| + | |RESERVED|| EXTMODE3 || EXTMODE2 || EXTMODE1 || EXTMODE0 | ||
| + | |} | ||
| + | |||
| + | <b>EXTMODEx:</b> This bits is used to select whether the EINTx pin is level or edge Triggered<br> | ||
| + | <br> | ||
| + | 0: EINTx is Level Triggered.<br> | ||
| + | 1: EINTx is Edge Triggered.<br> | ||
| + | <br><br> | ||
| + | |||
| + | |||
| + | {| class="table table-striped table-hover table-condensed table-bordered" | ||
| + | |-class="info" | ||
| + | |EXTPOLAR | ||
| + | |- | ||
| + | |31:4 || 3 || 2 || 1 || 0 | ||
| + | |- | ||
| + | |RESERVED|| EXTPOLAR3 || EXTPOLAR2 || EXTPOLAR1 || EXTPOLAR0 | ||
| + | |} | ||
| + | |||
| + | <b>EXTPOLARx:</b> This bits is used to select polarity(LOW/HIGH, FALLING/RISING) of the EINTx interrupt depending on the EXTMODE register. | ||
| + | <br> | ||
| + | 0: EINTx is Active Low or Falling Edge (depending on EXTMODEx).<br> | ||
| + | 1: EINTx is Active High or Rising Edge (depending on EXTMODEx).<br> | ||
| + | <br><br> | ||
Revision as of 20:15, 13 April 2016
Objective:
In this tutorial we will discuss how to configure and use the LPC1768 external interrupts(EINT0-EINT3).
At the end of tutorial we will see how to use the exploreembedded external interrupt library.
EINTx Pins
LPC1768 has four external interrupts EINT0-EINT3.
As LPC1768 pins are multi functional, these four interrupts are available on multiple pins.
Below table shows mapping of EINTx pins.
| Port Pin | PINSEL_FUNC_0 | PINSEL_FUNC_1 | PINSEL_FUNC_2 | PINSEL_FUNC_3 |
|---|---|---|---|---|
| P2.10 | GPIO | EINT0 | NMI | |
| P2.11 | GPIO | EINT1 | I2STX_CLK | |
| P2_12 | GPIO | EINT2 | I2STX_WS | |
| P2.13 | GPIO | EINT3 | I2STX_SDA |
EINT Registers
Below table shows the registers associated with LPC1768 external interrupts. LPC1768 interrupts can be configured as edge/level triggered.
| Register | Description |
|---|---|
| PINSELx | To configure the pins as External Interrupts |
| EXTINT | External Interrupt Flag Register contains interrupt flags for EINT0,EINT1, EINT2 & EINT3. |
| EXTMODE | External Interrupt Mode register(Level/Edge Triggered) |
| EXTPOLAR | External Interrupt Polarity(Falling/Rising Edge, Active Low/High) |
| EXTINT | ||||
| 31:4 | 3 | 2 | 1 | 0 |
| RESERVED | EINT3 | EINT2 | EINT1 | EINT0 |
EINTx: Bits will be set whenever the interrupt is detected on the particular interrupt pin.
If the interrupts are enabled then the control goes to ISR.
Writing one to specific bit will clear the corresponding interrupt.
| EXTMODE | ||||
| 31:4 | 3 | 2 | 1 | 0 |
| RESERVED | EXTMODE3 | EXTMODE2 | EXTMODE1 | EXTMODE0 |
EXTMODEx: This bits is used to select whether the EINTx pin is level or edge Triggered
0: EINTx is Level Triggered.
1: EINTx is Edge Triggered.
| EXTPOLAR | ||||
| 31:4 | 3 | 2 | 1 | 0 |
| RESERVED | EXTPOLAR3 | EXTPOLAR2 | EXTPOLAR1 | EXTPOLAR0 |
EXTPOLARx: This bits is used to select polarity(LOW/HIGH, FALLING/RISING) of the EINTx interrupt depending on the EXTMODE register.
0: EINTx is Active Low or Falling Edge (depending on EXTMODEx).
1: EINTx is Active High or Rising Edge (depending on EXTMODEx).