Revision as of 15:54, 24 March 2016

Objective

In this tutorial we are going to discuss the PWM module of LPC1768.
First we will see how to configure the PWM registers to generate signals of required PWM, At the end we will see how to use the ExploreEmdedded PWM library.

LPC1768 PWM Module

LPC1768 has 6 PWM output pins which can be used as 6-Single edged or 3-Double edged. There as seven match registers to support these 6 PWM output signals. Below block diagram shows the PWM pins and the associated Match(Duty Cycle) registers.

Adc Channel	Port Pin	Pin Functions	Associated PINSEL Register	Corresponding Match Register
PWM_1	P2.0	0-GPIO, 1-PWM1[1], 2-TXD1, 3-	0,1 bits of PINSEL4	MR1
PWM_2	P2.1	0-GPIO, 1-PWM1[2], 2-RXD1, 3-	2,3 bits of PINSEL4	MR2
PWM_3	P2.2	0-GPIO, 1-PWM1[3], 2-CTS1, 3-TRACEDATA[3]	4,5 bits of PINSEL4	MR3
PWM_4	P2.3	0-GPIO, 1-PWM1[4], 2-DCD1, 3-TRACEDATA[2]	6,7 bits of PINSEL4	MR4
PWM_5	P2.4	0-GPIO, 1-PWM1[5], 2-DSR1, 3-TRACEDATA[1]	8,9 bits of PINSEL4	MR5
PWM_6	P2.5	0-GPIO, 1-PWM1[6], 2-DTR1, 3-TRACEDATA[0]	10,11 bits of PINSEL4	MR6

LPC7168 PWM Registers

The below table shows the registers associated with LPC1768 PWM.

Register	Description
IR	Interrupt Register: The IR can be read to identify which of eight possible interrupt sources are pending. Writing Logic-1 will clear the corresponding interrupt.
TCR	Timer Control Register: The TCR is used to control the Timer Counter functions(enable/disable/reset).
TC	Timer Counter: The 32-bit TC is incremented every PR+1 cycles of PCLK. The TC is controlled through the TCR.
PR	Prescalar Register: This is used to specify the Prescalar value for incrementing the TC.
PC	Prescale Counter: The 32-bit PC is a counter which is incremented to the value stored in PR. When the value in PR is reached, the TC is incremented.
MCR	Match Control Register: The MCR is used to control the reseting of TC and generating of interrupt whenever a Match occurs.
MR0	Match Register: This register hold the max cycle Time(Ton+Toff).
MR1-MR6	Match Registers: These registers holds the Match value(PWM Duty) for corresponding PWM channels(PWM1-PWM6).
PCR	PWM Control Register: PWM Control Register. Enables PWM outputs and selects PWM channel types as either single edge or double edge controlled.
LER	Load Enable Register: Enables use of new PWM values once the match occurs.

Register Configuration

The below table shows the registers associated with LPC1768 PWM.

TCR
31:4	3	2	1	0
Reserved	PWM Enable	Reserved	Counter Reset	Counter Enable

Bit 0 – Counter Enable
This bit is used to Enable or Disable the PWM Timer and PWM Prescalar Counters
0- Disable the Counters
1- Enable the Counter incrementing.

Bit 1 – Counter reset
This bit is used to clear the PWM Timer and PWM Prescalar Counter values.
0- Do not Clear.
1- The PWM Timer Counter and the PWM Prescale Counter are synchronously reset on the next positive edge of PCLK.

Bit 3 – PWM Enable
Used to Enable or Disable the PWM Block.
0- PWM Disabled
1- PWM Enabled

MCR
31:21	20	19	18	-	5	4	3	2	1	0
Reserved	PWMMR6S	PWMMR6R	PWMMR6I	-	PWMMR1S	PWMMR1R	PWMMR1I	PWMMR0S	PWMMR0R	PWMMR0I

PWMMRxI
This bit is used to Enable or Disable the PWM interrupts when the PWMTC matches PWMMRx (x:0-6)
0- Disable the PWM Match interrupt
1- Enable the PWM Match interrupt.

PWMMRxR
This bit is used to Reset PWMTC whenever it Matches PWMRx(x:0-6)
0- Do not Clear.
1- Reset the PWMTC counter value whenever it matches PWMRx.

PWMMRxS
This bit is used to Stop the PWMTC,PWMPC whenever the PWMTC matches PWMMRx(x:0-6).
0- Disable the PWM stop o match feature
1- Enable the PWM Stop feature. This will stop the PWM whenever the PWMTC reaches the Match register value.

PCR
31:15	14-9	8-7	6-2	1-0
Unused	PWMENA6-PWMENA1	Unused	PWMSEL6-PWMSEL2	Unused

PWMSELx
This bit is used to select the single edged and double edge mode form PWMx (x:2-6)
0- Single Edge mode for PWMx
1- Double Edge Mode for PWMx.

PWMENAx
This bit is used to enable/disable the PWM output for PWMx(x:1-6)
0- PWMx Disable.
1- PWMx Enabled.

LER
31-7	6	5	4	3	2	1	0
Unused	LEN6	LEN5	LEN4	LEN3	LEN2	LEN1	LEN0

LENx
This bit is used Enable/Disable the loading of new Match value whenever the PWMTC is reset(x:0-6)
PWMTC will be continously incrementing whenever it reaches the PWMMRO, timer will be reset depeding on PWMTCR configuraion. Once the Timer is reset the New Match values will be loaded from MR0-MR6 depending on bits set in this register.
0- Disable the loading of new Match Values
1- Load the new Match values from MRx when the timer is reset.

Examples

Example 1

Program to demonstrate the LED blinking.
Here first the PORT2 pins are selected for GPIO using PINSEL register then they are configured as Output using the FIODIR register.
LEDs are turned ON by sending a high pulse using FIOSET register.
After some time the LEDs are turned OFF by sending the low pulse using FIOCLR register.

Example 2

This is second approach in which FIOPIN register is used for both setting and clearing the PORT pins.
Writing Logic 1 will set the PORT pin and writing 0 will Clear the particular PORT bit.

Using Explore Embedded Libraries :

In the above tutorial we just discussed how to configure the PORTS for GPIO for blinking the Leds.
Once you know the GPIO configurations, you can directly use the ExploreEmbedded libraries to play around with LEDs.
For that you need to include the gpio.c/gpio.h and the associated files(delay/stdutils).
The below sample code shows how to use the GPIO functions.

Refer this link for more info on GPIO libraries.

Downloads

Download the complete project folder from the below link: https://codeload.github.com/ExploreEmbedded/Explore-Cortex-M3-LPC1768-Stick-DVB-14001/zip/master

Have a opinion, suggestion , question or feedback about the article let it out here!

@@ Line 138: / Line 138: @@
 This bit is used Enable/Disable the loading of new Match value whenever the PWMTC is reset(x:0-6)<br>
 PWMTC will be continously incrementing whenever it reaches the PWMMRO, timer will be reset depeding on PWMTCR configuraion.
-Once the Timer is reset the New Match values will be loaded from MR0-MR6 depending on bits set in this register.
+Once the Timer is reset the New Match values will be loaded from MR0-MR6 depending on bits set in this register.<br>
 - Disable the loading of new Match Values<br>
 - Load the new Match values from MRx when the timer is reset.

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