Difference between revisions of "1. AVR Architecture"
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Fig below shows the architecture of the MegaAVR series of controllers. | Fig below shows the architecture of the MegaAVR series of controllers. | ||
As with any MCU ALU forms the core of the controller. A typical AVR Mega Series MCU has following hardware units inbuilt: | As with any MCU ALU forms the core of the controller. A typical AVR Mega Series MCU has following hardware units inbuilt: | ||
| + | [[File:AVR Architecture.GIF|x380px|right]] | ||
*The ALU | *The ALU | ||
*32 General Purpose Registers | *32 General Purpose Registers | ||
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**Analog | **Analog | ||
**Digital | **Digital | ||
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Revision as of 18:48, 23 September 2014
Why learn AVR Architecture?
Learning architecture of the micro-controller gives deep understanding of how it works. It also enables in writing better software for the same. Also programmers who understand the underlying hardware tend to write better programs.
The entire tutorial series will be based around Atmega32 MCU from Atmel. Hence in this tutorial we will look at AVR architecture in general however all the specifics would point to Atmega32.
Block Diagram
Fig below shows the architecture of the MegaAVR series of controllers. As with any MCU ALU forms the core of the controller. A typical AVR Mega Series MCU has following hardware units inbuilt:
- The ALU
- 32 General Purpose Registers
- Special Function Registers
- Static RAM
- EEPROM
- Flash
- Timer/Counter
- Compartor
- Watch Dog timer
- Protocols: UART, SPI, I2C
- Interrupt Handler
- IO Ports
- Analog
- Digital