Latest revision as of 13:39, 5 May 2016

In this tutorial we are going to discuss how to use the inbuilt LPC1768 ADC.
Here we will discuss the register associated with ADC and mainly we will focus on basic registers required for ADC.
The other features like Burst Conversion, accessing different register for each channel, ADC conversion depending on Timers,ADC Interrupts etc will be out of scope of this tutorial.
Later we will see how to interface a POT,LDR,Temp Sensor(LM35).
Finally we will see how to use the ExploreEmbedded libraries for ADC.

LPC1768 ADC Block

LPC1768 has an inbuilt 12 bit Successive Approximation ADC which is multiplexed among 8 input pins.
The ADC reference voltage is measured across VREFN to VREFP, meaning it can do the conversion within this range. Usually the VREFP is connected to VDD and VREFN is connected to GND.
As LPC1768 works on 3.3 volts, this will be the ADC reference voltage.
Now the $$resolution of ADC = 3.3/(2^{12}) = 3.3/4096 =0.000805 = 0.8mV$$

The below block diagram shows the ADC input pins multiplexed with other GPIO pins.
The ADC pin can be enabled by configuring the corresponding PINSEL register to select ADC function.
When the ADC function is selected for that pin in the Pin Select register, other Digital signals are disconnected from the ADC input pins.

ADC Registers

The below table shows the registers associated with LPC1768 ADC.
We are going to focus only on ADCR and ADGDR as these are sufficient for simple A/D conversion.
However once you are familer with LPC1768 ADC, you can explore the other features and the associated registers.

ADC Register Configuration

Now lets see how to configure the individual registers for ADC conversion.

Bit 7:0 – SEL : Channel Select
These bits are used to select a particular channel for ADC conversion. One bit is allotted for each channel. Setting the Bit-0 will make the ADC to sample AD0[0] for conversion. Similary setting bit-7 will do the conversion for AD0[7].

Bit 15:8 – CLCKDIV : Clock Divisor
The APB clock (PCLK_ADC0) is divided by (this value plus one) to produce the clock for the A/D converter, which should be less than or equal to 13 MHz.

Bit 16 – BURST
This bit is used for BURST conversion. If this bit is set the ADC module will do the conversion for all the channels that are selected(SET) in SEL bits.
CLearing this bit will disable the BURST conversion.

Bit 21 – PDN : Power Down Mode
Setting this bit brings ADC out of power down mode and makes it operational.
Clearing this bit will power down the ADC.

Bit 24:26 – START
When the BURST bit is 0, these bits control whether and when an A/D conversion is started:
000 - Conversion Stopped
001- Start Conversion Now

The remaining cases (010 to 111) are about starting conversion on occurrence of edge on a particular CAP or MAT pin.

Bit 27 - EDGE
This bit is significant only when the START field contains 010-111. It starts conversion on selected CAP or MAT input.
0 - On Falling Edge
1 - On Rising Edge

ADGDR ( ADC Global Data Register )

Bit 15:4 - RESULT
This field contains the 12bit A/D conversion value for the selected channel in ADCR.SEL
The vale for this register should be read oncve the conversion is completed ie DONE bit is set.

Bit 26:24 - CHN : Channel
These bits contain the channel number for which the A/D conversion is done and the converted value is available in RESULT bits(e.g. 000 identifies channel 0, 011 channel 3...).

Bit 27 - OVERRUN
This bit is set during the BURST mode where the previous conversion data is overwritten by the new A/D conversion value.

Bit 31 - DONE
This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read and when the ADCR is written. If the ADCR is written while a conversion is still in progress, this bit is set and a new conversion is started.

Some other registers

Though there are some more registers, we are restricting ourselves to use these registers only as this will be more convenient.

Apart from ADC Global Data register there are more 8 ADC Data registers (one Data register per ADC channel). DONE and OVERRUN bits for each channel can be monitored separately from the bits present in ADC Status register.

One can use the A/D Global Data Register to read all data from the ADC else use the A/D Channel Data Registers. It is important to use one method consistently because the DONE and OVERRUN flags can otherwise get out of synch between the AD0GDR and the A/D Channel Data Registers, potentially causing erroneous interrupts or DMA activity.

Hardware Connections

Steps for Configuring ADC

Below are the steps for configuring the LPC1768 ADC.

1. Configure the GPIO pin for ADC function using PINSEL register.
2. Enable the CLock to ADC module.
3. Deselect all the channels and Power on the internal ADC module by setting ADCR.PDN bit.
4. Select the Particular channel for A/D conversion by setting the corresponding bits in ADCR.SEL
5. Set the ADCR.START bit for starting the A/D conversion for selected channel.
6. Wait for the conversion to complete, ADGR.DONE bit will be set once conversion is over.
7. Read the 12-bit A/D value from ADGR.RESULT.
8. Use it for further processing or just display on LCD.
   
   

Code Examples

Example 1

Here we are going to do the A/D conversion for only ADC[0]. The result of the A/D conversion will be displayed on the LCD.

Using Explore Embedded Libraries

In the above example we discussed how to configure and use the inbuilt LPC1768 ADC.
Now we will see how to use the exploreEmbededd ADC libraries and interface POT,LDR and Temperature Sensor(LM35).
Refer the LCD tutorial for interfacing the 2x16 lcd.

Downloads

Download the complete project folder from the below link: https://codeload.github.com/ExploreEmbedded/Explore-Cortex-M3-LPC1768-Stick-DVB-14001/zip/master

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